Need Design Verification Engineer(RTL) for Remote Opportunity at Remote, Remote, USA |
Email: [email protected] |
Need Passport number for Submission Need 10+ years of experience Hi, Pleasure mailing you. Please go through the below requirement and let me know if you are comfortable for the position. Please send me your updated resume along with the best hourly rate, work authorization status and availability. An early response is really appreciated. Job Title : Design Verification Engineer Location : Remote Duration : 12+ months Job description: Key Responsibilities: Verifying RTL implementation for complex digital blocks to ensure high quality Developing verification strategies for new features, plan volume validation and coverage strategies Writing testplan, developing testbenches, coding test/sequences and checker to support IP level verification in constrained-random and/or directed verification environments using System Verilog & UVM Working with designers to do coverage analysis and take necessary actions to meet coverage goals Integrate VIPs as needed Closely work with design teams to drive feature enablement Mentor junior engineers on the team Preferred Experience: Working experience on PCIe, DMA and/or NVMe protocols required Knowledge of bus protocols like AXI/AHB desired Grounds-up development experience with implementation of UVM/OVM and/or Verilog, System Verilog test benches and/or BFMs is required Strong understanding of simulation tools and knowledge of scripting languages like Perl, tcl or cshell Highly motivated, Self-starter individual with ability to work in a fast-paced team environment Thanks Tekskills Surya Teja Lead US IT Recruiter Email : [email protected] -- Keywords: information technology golang California |
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Tue Jan 30 20:44:00 UTC 2024 |