| FPGA Design || San Diego, CA at San Diego, California, USA |
| Email: [email protected] |
| Role: FPGA Design OR Verification Engineer Senior Level Location: San Diego, CA Experience: 10+ Years JOB SUMMARY Contribute to the specification, design, implementation and validation of FPGAs within highly reliable electronics for ASML's EUV systems. Participate in cross-functional teams and work with multiple engineering groups to outline and create FPGA designs and associated engineering documentation. Design, implement and test new FPGA features while using robust methodologies defined as a part of the design process. Work with advanced technologies including SoC architecture, digital communication (PCIe, 1G+ Ethernet, EtherCAT, etc), photo-detectors, signal acquisition, and distributed high precision timestamping. Assist cross-functional teams with the integration of the FPGA designs into the system environment. QUALIFICATIONS 10+ years experience in electronic design and verification, with hands-on experience in requirements specification, detailed design, verification plan, design validation and qualification deep knowledge of digital design fundamentals, including clock-domain-crossing (CDC) strong competence of FPGA tooling including synthesis, building, timing analysis and simulation experienced with architecting and coding FPGAs using VHDL, experience with SystemVerilog and UVM framework proficiency a plus for verification hands-on experience with board, module and system level electronic troubleshooting , including experience with engineering test equipment such as logic analyzers and bus analyzers bash/perl/python scripting a big plus for verification, validation and process automation. Knowledge of Makefile a plus, familiarity with Linux/Unix OS is needed knowledge of change management and revision control tools such as SVN or Git will be a plus strong communication skills and ownership of solution space, including ability to author technical specifications, and procedures and driving to completion with minimum oversight. demonstrated ability to work in a process driven environment, with a structured problem solving approach BSEE required, MSEE preferred DUTIES AND RESPONSIBILITIES Create FPGA requirement specifications from contributing flow down documents. Generate test specifications to track and ensure functional specifications are fully met Ability to work independently as well as communicate and work well within the FPGA team Interact with other design groups such as software and controls to facilitate the design integration effort Apply use of best design practices with a strong bias of what it takes to deliver highly reliable designs Own quality of all assigned deliverables Submittal Format: Skype ID Candidates name: Phone number: Email address: Visa status (With validity): Current location: Willing to relocate: Interview Availability: Expected salary/rate: Notice period: Highest education (Including date) Reason for change: Communication: LinkedIn Profile: If Ex-TechM Employee required ID NO: Reporting Manager: Project name: Exit reason: Last 3 Months rating: -- Regards Ramesh || Sr. Technical Recruiter Phone:630-219-1613 Email: [email protected] LinkedIn: https://www.linkedin.com/in/ramesh-reddy-aa7760170/ 800 W, Fifth Avenue, Suite 208A Naperville, IL 60563 "A Certified MBE & Women's Business Enterprise Alliance (WBEA)" -- Keywords: information technology California Idaho Illinois |
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| Wed Jan 31 23:57:00 UTC 2024 |