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Design for testing (DFT) Function Testing at San Jose, California, USA
Email: [email protected]
From:

Eli,

RCube Creative Consulting

[email protected]

Reply to:   [email protected]

Hello There,

Position:

Design for testing (DFT) Function Testing

Work Location: San Jose, California

Duration: 12 months

Rate: Open

Visa: H1B/Citizen/C2C

Experience: 12 -15 Years

Lead the Silicon bring up process for the new chip from initial power on to Functional Validation and Performance Optimization

        Develop Comprehensive validation plans and methodologies to ensure the functionality, performance and reliability of Silicon.

        Oversee functional Validation activities for Silicon with a focus on hardware debugging and Troubleshooting.

        Collaborate closely with the cross-functional teams and IP Vendors to identify, analyze to resolve the complex silicon issues.

        Employ advanced debugging techniques and tools to investigate and resolve hardware-related issues using Instrumentation.

        Drive Continuous improvement initiatives to enhance the validation process.

        Stay Updated with the Industry Standards related to High-speed IO interfaces and contribute to the development.

Interfaces: PCIE, Ethernet, MIPI, DDR, USB

Programming: Embedded C, Python

        Strong Understanding of Digital and Analog circuitry, Architecture and Validation concepts.

        5+ Years of hands-on experience in silicon bring up.

        Experience with High speed IO protocols and standards such as PCIE, Ethernet, DDR, MIPI and USB

        Proven Expertise in developing and executing validation plans, test cases and methodologies in Silicon .

        Must have knowledge of using Lab equipments logic and spectrum analyzers and basic lab instruments like DMM, Scope.

        Proficient in scripting and programming Languages for testing and debugging the scripts.

        Excellent analytical, problem solving skills with the ability to effectively collaborate with the cross functional Teams.

        Strong Understanding of JTAG and experience with JTAG debugging tools for debugging hardware/software interactions and validating JTAG-based register access.

    Education:        B.E/M. E in Electronics

    Specific or    Entrepreneurial Knowledge

                 - Understand the client requirements and build quick solutions    

- Willing and able to dive into new things and pick them up fast

                    - Very good technical and analytical skills required to evaluate complex situations

                 - Strong analytical/problem solving skills, ability to learn quickly, and pronounced attention to detail

KEYWORDS:        

Design for testing (DFT)

PCIE

Ethernet

MIPI

DDR

USB

Embedded C

Python

Functional Validation

Performance Optimization

reliability of Silicon

hardware debugging

hardware Troubleshooting

Resolve hardware issues

High-speed IO

Keywords: cprogramm
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Wed Mar 20 23:24:00 UTC 2024

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Location: San Jose, California