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Urgent Requirement for :: Post Silicon Validation Engineer at Post, Texas, USA
Email: [email protected]
From:

Nirbhay singh,

Appian infotech Inc

[email protected]

Reply to: [email protected]

Hi

We have urgent Requirement for ::
Post Silicon Validation Engineer

Role:
Post Silicon Validation Engineer

Location:
Santa Clara, CA
(Onsite)

Job Type: Long Term Project

Job Description:

Protocol: PCIE, Ethernet, JTAG, I2C

Language: Python, C/C++, System Verilog

Pre-silicon design verification & testbench

Post-silicon validation on board & FPGA

Test Case writing and Debug expertise & Silicon bringup.

Regards

Nirbhay Singh

Appian Infotech Inc

Contact No- 276 910 0146 Ext. 128

Email-
nirbhay.s

@appianinfotech.com

LinkedIn:-
https://www.linkedin.com/in/n-k-singh-430076245/

Keywords: cprogramm cplusplus California
Urgent Requirement for :: Post Silicon Validation Engineer
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Tue May 28 22:33:00 UTC 2024

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Location: Santa Clara, California