| Urgent Requirement for :: Post Silicon Validation Engineer at Post, Texas, USA |
| Email: [email protected] |
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http://bit.ly/4ey8w48 https://jobs.nvoids.com/job_details.jsp?id=1431034&uid= From: Nirbhay singh, Appian infotech Inc [email protected] Reply to: [email protected] Hi We have urgent Requirement for :: Post Silicon Validation Engineer Role: Post Silicon Validation Engineer Location: Santa Clara, CA (Onsite) Job Type: Long Term Project Job Description: Protocol: PCIE, Ethernet, JTAG, I2C Language: Python, C/C++, System Verilog Pre-silicon design verification & testbench Post-silicon validation on board & FPGA Test Case writing and Debug expertise & Silicon bringup. Regards Nirbhay Singh Appian Infotech Inc Contact No- 276 910 0146 Ext. 128 Email- nirbhay.s @appianinfotech.com LinkedIn:- https://www.linkedin.com/in/n-k-singh-430076245/ Keywords: cprogramm cplusplus California Urgent Requirement for :: Post Silicon Validation Engineer [email protected] http://bit.ly/4ey8w48 https://jobs.nvoids.com/job_details.jsp?id=1431034&uid= |
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| 10:33 PM 28-May-24 |