| Senior Technical Lead- Palo Alto CA-Onsite at Alto, Texas, USA |
| Email: [email protected] |
| From: Supriya, Yochana [email protected] Reply to: [email protected] Hello, Hope you are doing great!!! This is Sai Supriya from Yochana IT Solutions, we have an urgent requirement with one of our clients, please go through the requirement below and let me know your interest. You can forward this opportunity to your friends or colleagues; so that we can help someone who may be desperately looking for opportunities. I sincerely appreciate your time. Role : Senior Technical Lead Location : Palo Alto, CA, 94304 Onsite Long trem Contract Keywords : High Speed Design / System Integration Testing / Hardware Design / Hardware Verification / FPGA / Signal Integrity Analysis JD : Must be Engineering graduate with Electrical/Electronics background. Experience in Hardware Design, Signal Integrity Analysis, High Speed Design, Hardware characterization, verification, and validation. Responsible for High-Speed Hardware design with complex multiple FPGAs, CPLD and SoC based architecture which includes test planning, test execution, and reporting. Knowledge of Hardware Board level and Chip level testing. Design and develop electronics hardware board with experience in drafting schematic, component Selection, Placement of components in Printed Circuit board (PCB) Familiarity with setting up data acquisition systems (oscilloscope, PCI, Logic Analyzer) Hands on experience in testing motors (Stepper/Servo), sensors, solenoids, pressure and temperature measurement devices. A clear understanding of the development lifecycles of hardware and software Strong project management skills: able to prioritize time and multi-task when required Able to design and develop Electronic circuits that compatible with regulatory standards and able to perform EMI / EMC testing to qualify the required regulatory standards like FCC, IEC60601-x, UL, CE etc. Thanks & Regards, Sai Supriya Resource Specialist, Direct No-2485370766 Keywords: information technology golang container edition California Senior Technical Lead- Palo Alto CA-Onsite [email protected] |
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| Fri Jul 12 01:55:00 UTC 2024 |