| Verification Engineer - Onsite in SFO CA at San Francisco, California, USA |
| Email: [email protected] |
| Location: San Francisco, CA Duration: 6+ Months Preferred Qualifications: 7+ years of experience in pre-silicon design verification Proficiency in C-shell scripting, Verilog-HDL & System Verilog. Strong knowledge in SV Assertions, UVM/OVM and functional code coverage. SOC Verification experience using ARM Cortex Microcontroller is required. Experience with advanced peripheral bus Verification IPs such as GPIO, UART, SPI, SW, JTAG, and I2C. Proficient with Cadence tools such as NCVerilog, NCSIM, Simvision. Experience with linting tools (i.e Spyglass) will be helpful. Exposure to SDF annotated simulations with good understanding of parasitic delays and timings is required. Independent, self-motivated with good analytical & communication skills -- Keywords: cprogramm information technology California Verification Engineer - Onsite in SFO CA [email protected] |
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| Thu Aug 01 00:49:00 UTC 2024 |