| Pre-Silicon Validation Engineer for Mountain View, CA - Hybrid at Mountain View, California, USA |
| Email: [email protected] |
| From: Kiran Nagani, GAC Solutions [email protected] Reply to: [email protected] Role: Pre-Silicon Validation Engineer Location: Mountain View, CA Hybrid Duration: 6+ Months contract Job Description: B.Tech/M.Tech in Electronics Engg, Electrical Engg or Computer Science 10+ yrs experience in Pre-Silicon validation/Post Silicon validation Experience in using Emulation platform and FPGA prototyping platform Strong experience in C coding at Bare Metal/Firmware level Experience on Test plan development and Test infra development. Good understanding of CPU architecture (ARM/INTEL/MIPS, etc..) Working experience in Design protocol such as PCIe, AXI, USB, Gigabit Ethernet, MIPI, etc Working experience in low-speed protocols such as SPI, I2C, UART, Mixed signal IPs. Exposure to WiFi & Bluetooth protocols. Very good experience in Debugging code at the bare metal/Firmware level Usage of Measurement instruments like Oscilloscope, Logic Analyser, Current analyser, etc.. Exposure to UVM methodology C coding for various IPs within the CPU Prepare validation plan and test code Prepare Functional code on Emulation and target the same for Post Silicon validation Cross communicates with various design teams & IP vendors Mentor & Co-ordinate with the team for task completion POC for any communication with the Vendor. Working experience in Design protocol such as PCIe, AXI, USB, Gigabit Ethernet, MIPI, etc Working experience in low-speed protocols such as SPI, I2C, UART, Mixed signal IPs. Knowledge of CPU architecture (ARM/INTEL/MIPS, etc..) Keywords: cprogramm California Colorado Pre-Silicon Validation Engineer for Mountain View, CA - Hybrid [email protected] |
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| Tue Aug 06 21:08:00 UTC 2024 |