| Senior Technical Lead||Palo Alto, CA, 94304 - Onsite at Alto, Texas, USA |
| Email: [email protected] |
| Hi All, Role : Senior Technical Lead Location : Palo Alto, CA, 94304 Onsite Keywords : High Speed Design / System Integration Testing / Hardware Design / Hardware Verification / FPGA / Signal Integrity Analysis JD : 1. Must be Engineering graduate with Electrical/Electronics background. 2. Experience in Hardware Design, Signal Integrity Analysis, High Speed Design, Hardware characterization, verification, and validation. 3. Responsible for High-Speed Hardware design with complex multiple FPGAs, CPLD and SoC based architecture which includes test planning, test execution, and reporting. 4. Knowledge of Hardware Board level and Chip level testing. 5. Design and develop electronics hardware board with experience in drafting schematic, component Selection, Placement of components in Printed Circuit board (PCB) 6. Familiarity with setting up data acquisition systems (oscilloscope, PCI, Logic Analyzer) 7. Hands on experience in testing motors (Stepper/Servo), sensors, solenoids, pressure and temperature measurement devices. 8. A clear understanding of the development lifecycles of hardware and software 9. Strong project management skills: able to prioritize time and multi-task when required 10. Able to design and develop Electronic circuits that compatible with regulatory standards and able to perform EMI / EMC testing to qualify the required regulatory standards like FCC, IEC60601-x, UL, CE etc. Thanks & Regards Mohd Faisal [email protected] www.signinsol.com To follow and receive more updates please Click Here -- Keywords: information technology container edition California Maryland Senior Technical Lead||Palo Alto, CA, 94304 - Onsite [email protected] |
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| Sat Aug 17 02:27:00 UTC 2024 |