| Urgent hiring -Sr Validation Engineer-San Jose, CA - 100% onsite at San Jose, California, USA |
| Email: [email protected] |
| From: Sradha Suman Nayak, Adventa tech [email protected] Reply to: [email protected] Title: Sr Validation Engineer Location : San Jose, CA - 100% onsite Duration: 6 months Visa: USC/GC Moi: Skype Spotlight call notes: Top skills: SerDes testing, Python, compliance, Signal Integrity, and data processing As a SerDes V&C team member, you will be part of industry-leading engineering team that is developing validation and characteristics solutions for the cutting-edge generation of transceivers. Successful candidates will work as part of a team on projects which may include: Validating PMA (or PHY) blocks of transceivers Developing automation testing scripts and scenarios Running automation scripts or compliance test suites Processing and reporting test results Education Requirements Bachelor's Degree in EE, CS or related fields with 5+ years of work experience, or, Masters Degree in EE, CS or related fields with 3+ years of work experience Qualifications Hands-on experience with high-speed scope, BERTs, VNA and associated lab equipment for SERDES characterization Experienced in Python and automation techniques A team player with strong written and verbal skills Experienced in C++, or FPGA design is a plus Understanding board design, or experienced in Signal Integrity is a plus Keywords: cprogramm cplusplus green card California Urgent hiring -Sr Validation Engineer-San Jose, CA - 100% onsite [email protected] |
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| Fri Oct 11 00:20:00 UTC 2024 |