| Silicon Design Verification Infrastructure Engineer - San Francisco, CA, Seattle, WA, Santa Clara, CA - Onsite at Seattle, Washington, USA |
| Email: [email protected] |
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http://bit.ly/4ey8w48 https://jobs.nvoids.com/job_details.jsp?id=2175334&uid= From: Praveena Kanakanti, GAC Solutions [email protected] Reply to: [email protected] Hi, This is Praveena from GAC Solutions. Hope you are doing good. Role: Silicon Design/Verification Infrastructure Engineer Location: San Francisco, CA / Seattle, WA / Santa Clara, CA - Onsite Duration: Contract Job Description: Minimum 5 years of experience in EDA/CAD SoC/IP design and/or verification infrastructure development Proficiency in modern Python (Python 3.x) - intermediate or above - demonstrated by work experience knowledge of AISC/SoC flow, System Verilog/UVM Experience in development in Linux based environments ( scripting, Makefile, etc.) Work on subsystems with multiple processors (ARM/RISC) and NOC, focusing on integration testing, and top-level functionalities. Utilize your experience with UVM-based SoC verification. Apply your working knowledge of C to understand existing code, write basic tests, compile, and create hex code for processor tests. Engage in design verification involving concurrency and simultaneous memory access. Define and implement SoC verification plans and build verification test benches for sub-system/SoC level verification. Develop functional tests based on the verification test plan. Drive design verification to closure using defined metrics for test plans, functional, and code coverage. Debug, root-cause, and resolve functional failures in the design in collaboration with the Design team. Collaborate with cross-functional teams (Design, Model, Emulation, and Silicon validation) to ensure the highest design quality. Develop and drive continuous improvements in design verification using the latest methodologies, tools, and technologies -Thanks, Praveena Kanakanti E: [email protected] www.gacsol.com Experts in Digitalization and Engineering - Enterprise 4.0 Keywords: cprogramm California Washington Silicon Design Verification Infrastructure Engineer - San Francisco, CA, Seattle, WA, Santa Clara, CA - Onsite [email protected] http://bit.ly/4ey8w48 https://jobs.nvoids.com/job_details.jsp?id=2175334&uid= |
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| 04:11 AM 14-Feb-25 |