| DFT MBIST Staff Engineer - Remote at Remote, Remote, USA |
| Email: [email protected] |
|
http://bit.ly/4ey8w48 https://jobs.nvoids.com/job_details.jsp?id=3655423&uid=2fb18eff41df45a8a396eb3a3de6a6d0 From: Chandu, intellecttechsolutions [email protected] Reply to: [email protected] Role: DFT MBIST Staff Engineer | Location Remote (must be aligned with PST time zone) Any Visa Responsibilities: Perform MBIST insertion for complex SoC designs using Synopsys SMS. Integrate and verify MBIST at the top level. Develop, execute, and debug MBIST simulations using Synopsys VCS, including: RTL No-delay gate level simulations With-delay (timing-aware) simulations Generate and validate MBIST test patterns using Vecgen. Debug RTL, simulation, and MBIST integration issues. Support silicon bring-up, characterization, and post-silicon debug related to MBIST, memory failures, and DFT infrastructure. Work closely with DFT, RTL, Physical Design, and Product Engineering teams to resolve implementation issues. Drive issue resolution independently and document implementation flows and debug findings. Required Qualifications 8+ years of hands-on DFT experience, with significant focus on MBIST. Strong experience with Synopsys MBIST (SMS), preferably SMS6 and/or SMS5. Proficiency with Synopsys VCS for MBIST verification and simulation. Deep understanding of the complete MBIST flow: MBIST insertion Top-level integration Verification Pattern generation (Vecgen) Diagnostics Simulation and debug Strong understanding of MBIST test algorithms (e.g., March algorithms) and memory repair schemes (BIRA/BISR, redundancy analysis, spare row/column allocation). Experience running and debugging: No-delay simulations With-delay simulations Experience supporting silicon bring-up, post-silicon debug, and root-cause analysis of MBIST and memory-related failures. Strong debugging and root-cause analysis skills across RTL, MBIST, and simulation environments. Ability to work independently with minimal supervision. Experience with large, complex SoC designs containing multiple memory instances. Familiarity with Verilog/SystemVerilog and standard DFT methodologies. Preferred Qualifications Experience with advanced SoC DFT integration. Familiarity with ATPG and scan insertion flows. Experience with scripting (Tcl, Perl, or Python) to automate MBIST flows and debug. Experience working in fast-paced semiconductor product development. Key Skills Synopsys MBIST (SMS5/SMS6) Synopsys VCS MBIST insertion Top-level MBIST verification VecGen pattern generation MBIST diagnostics MBIST repair schemes and memory test algorithms No-delay, with-delay simulation and debug Silicon bring-up and post-silicon debug SoC DFT integration Tcl / Perl / Python scripting Strong communication skills Self-motivated and capable of working independently Ideal Candidate The ideal contractor is a senior, hands-on MBIST engineer who can quickly become productive with minimal ramp-up. They should have deep experience with Synopsys SMS and VCS, excellent debugging skills, strong communication abilities, and a proven track record of independently delivering MBIST implementation, verification, and debug for complex SoC designs. | Keywords: information technology DFT MBIST Staff Engineer - Remote [email protected] http://bit.ly/4ey8w48 https://jobs.nvoids.com/job_details.jsp?id=3655423&uid=2fb18eff41df45a8a396eb3a3de6a6d0 |
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| 10:38 PM 02-Sep-26 |