| Verification engineer at Remote, Remote, USA |
| Email: [email protected] |
| From: Amit Sharma, Tekinspirations LLC [email protected] Reply to: [email protected] Position:Verification engineer Duration:12months Location:remote MOI:Video/Skype Fullyremote Qualifications: BSEE or BSCS, or equivalent; MSEE preferred Candidate must be a U.S. citizen and able to qualify for DoD security clearance 10 years of experience in a design engineering role focusing on functional verification 10 years of ASIC/FPGA verification experience using SystemVerilog / UVM Must have experience in: Developing verification plans Designing and implementing SystemVerilog / UVM test benches for constrained-random verification Developing functional coverage models Writing and debugging directed and random test cases Enabling test benches for hardware acceleration Experience with automation/scripting (Perl, sed, awk, tcl/tk, sh) C programming desirable. SystemC and C used in conjunction with chip design and verification highly desired Good communication skills Experience with Formal verification / property checking is a plus Experience with emulation or FPGA prototyping is a plus RTL design experience and knowledge of standard protocols (such as PCIe) is a plus FPGA experience is a plus JobDescription: Deliver consulting services covering a broad range of functional verification and emulation activities. Responsible for leading and executing consulting programs and working with customers to implement and deploy advanced verification methodologies. Help customers leverage the full capability of Siemens EDA verification tools and technologies. Communicate customer technical requirements to product marketing Keywords: cprogramm |
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| Fri Jul 14 20:26:00 UTC 2023 |