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Senior Validation Engineer at San Jose, California, USA
Email: [email protected]
From:

Cauvery Priyadarshini,

Vyze Inc.

[email protected]

Reply to:   [email protected]

Hi,

This is Cauvery from Vyze Inc.

Please
find the below position
, if youre comfortable with the JD kindly revert me bacK
.

Job Description -

JOB TITLE: Senior Validation Engineer

Duration: 6+ Month

Location: San Jose, CA (Hybrid)

Visa: H1B only

MOI: Skype

Local candidates of San Jose CA need apply .

LinkedIn is mandatory otherwise PV will not accept .

Must Have Skills: (7+ years exp.)

Embedded

Validation/Verification

Silicon

Firmware

Responsibilities:

Lead and debug failures with multi-functional partner teams like: Software/Firmware, System Hardware and Silicon teams.

Work with experts from cross functional teams to understand SoC and system behavior: OS kernel/driver, Silicon Validation (using unit-level IP & SoC tests), SoC IP integration and verification, FPGA Prototyping and Emulation (Palladium/ZeBu/Veloce), Systems Integration, board debug.

Collaborate across architecture, design, and software teams to develop test plans. Debug and correlate silicon data.

Create validation test plans, ensuring all key features are covered. Write low-level driver code as RTOS to configure and run various sub-systems (e.g. Camera, display, video encoders/decoders, PCIe, USB, machine learning etc.). Bring up pre-Si prototypes and drive validation of functional & PnP features using bare-metal/RTOS workloads. Debug and bring-up of low power SOCs and lead validation testing of system hardware design.

Thanks and Regards.

Cauvery Priyadarshini

US IT Recruiter

Vyze INC (An E- VerifiedCompany)

Email:
[email protected]  

25179 Methley Plum Place, Aldie, VA 20105

www.vyzeinc.com

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Keywords: information technology California Virginia
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Wed Aug 16 22:32:00 UTC 2023

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