| Verification Engineere||Remote||Skype||6-12Months at Remote, Remote, USA |
| Email: [email protected] |
| From: Shiva Chauhan, TEK Inspirations LLC [email protected] Reply to: [email protected] Hello, Hope you are doing well, Please check the below job description and let me know if you have any suitable candidate for the same: Position: verification engineer 8 - 12 years of experience and a focus on verification rather than hardware design Strong UVM object oriented test bench writing, System Verilog Remote 6-12 months Must-haves UVM experience Highly skilled at object oriented programming Good functional coverage skills 5-12 years of experience High priority Experience with agile development and delivery Experience with git for revision control Excellent written and verbal communication skills BSEE or BSCS, or equivalent; MSEE preferred Candidate must be a U.S. citizen and able to qualify for DoD security clearance 5+ years of experience in a design engineering role focusing on functional verification 5+ years of ASIC/FPGA verification experience using SystemVerilog / UVM Must have experience in: Developing verification plans Designing and implementing SystemVerilog / UVM test benches Thanks & Regards, Shiva Chauhan IT Recruiter TEK Inspirations LLC : 13573 Tabasco Cat Trail, Frisco, TX 75035 Email: [email protected] Keywords: information technology Texas |
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| Thu Dec 14 01:43:00 UTC 2023 |