| IO Electrical Validation Engineer || Bay Area , CA at Bay, Arkansas, USA |
| Email: [email protected] |
| Role: IO Electrical Validation Engineer Job Description : Educational Qualifications: B.E. degree with Electrical/Electronic as major subjects. Work Experience: 2 to 6 years of relevant work experience. Technical Skills: Required: Clarity on signal integrity concepts (e.g., insertion loss, reflections, crosstalk, etc.). Clarity on signal quality parameters (e.g., eye diagram, jitter, frequency ppm, duty cycle, etc.) and how to measure them. Familiarity with working in a lab environment and strong knowledge of using various equipment like DSO, Multimeter, Power supplies (e.g., idea about ESD, minimum oscilloscope/probe BW required for measurement, etc.). Knowledge to understand board design from schematics (*.pdf file) and layout (*.brd file - using Cadence Allegro tool) (e.g., should be able to understand signal/power topology from schematics, should be able to locate test points in PCB for signal of interest, etc.). Knowledge to assemble an x86 motherboard (e.g., connect SMPS, DRAM cards, PCIe AIC, display, other peripherals, etc. to the x86 motherboard). Knowledge of board/chip bring-up flow (e.g., idea on list of items to verify before/after attaching chip to board, like verifying No-Stuff components, impedance of voltage rails, etc.). Proficiency in Windows & Linux OS and Microsoft Office tools (e.g., in Linux: navigate folders, edit text files, move/copy files, SSH, execute scripts, etc.). Familiarity with scripting languages like Python/Perl (e.g., idea about installing different python modules, execute python scripts, etc.). Desirable: Knowledge and hands-on experience on high speed SERDES IO (like PCIe, USB3, UFS, Ethernet, etc.) validation (e.g., eye measurement, JTOL testing, etc.). Knowledge and hands-on experience of using equipment like BERT (Bit Error Ratio Tester), PCIe/USB3/UFS Logic Analyzer, etc. Knowledge and hands-on experience on Silicon PVT characterization. Knowledge and hands-on experience on board bring-up and testing. Soft Skills: Be an effective team player (e.g., volunteer to take up work, own up the task and approach folks to get things done, etc.). Communicate observations/requirements in a crisp and straightforward way. Other: Role: IO Electrical Validation Engineer Job Description : Educational Qualifications: B.E. degree with Electrical/Electronic as major subjects. Work Experience: 2 to 6 years of relevant work experience. Technical Skills: Required: Clarity on signal integrity concepts (e.g., insertion loss, reflections, crosstalk, etc.). Clarity on signal quality parameters (e.g., eye diagram, jitter, frequency ppm, duty cycle, etc.) and how to measure them. Familiarity with working in a lab environment and strong knowledge of using various equipment like DSO, Multimeter, Power supplies (e.g., idea about ESD, minimum oscilloscope/probe BW required for measurement, etc.). Knowledge to understand board design from schematics (*.pdf file) and layout (*.brd file - using Cadence Allegro tool) (e.g., should be able to understand signal/power topology from schematics, should be able to locate test points in PCB for signal of interest, etc.). Knowledge to assemble an x86 motherboard (e.g., connect SMPS, DRAM cards, PCIe AIC, display, other peripherals, etc. to the x86 motherboard). Knowledge of board/chip bring-up flow (e.g., idea on list of items to verify before/after attaching chip to board, like verifying No-Stuff components, impedance of voltage rails, etc.). Proficiency in Windows & Linux OS and Microsoft Office tools (e.g., in Linux: navigate folders, edit text files, move/copy files, SSH, execute scripts, etc.). Familiarity with scripting languages like Python/Perl (e.g., idea about installing different python modules, execute python scripts, etc.). Desirable: Knowledge and hands-on experience on high speed SERDES IO (like PCIe, USB3, UFS, Ethernet, etc.) validation (e.g., eye measurement, JTOL testing, etc.). Knowledge and hands-on experience of using equipment like BERT (Bit Error Ratio Tester), PCIe/USB3/UFS Logic Analyzer, etc. Knowledge and hands-on experience on Silicon PVT characterization. Knowledge and hands-on experience on board bring-up and testing. Soft Skills: Be an effective team player (e.g., volunteer to take up work, own up the task and approach folks to get things done, etc.). Communicate observations/requirements in a crisp and straightforward way. Other: Engineer should be comfortable working from the office (lab) every day (excluding holidays). Thanks, and Regards , Muskan Shukla Desk: 212-729-6543 Ext 635 Tanisha Systems Inc. 99 Wood Ave South, Suite # 308, Iselin, NJ 08830 Email: [email protected] Muskan Shukla | LinkedInEngineer should be comfortable working from the office (lab) every day (excluding holidays). Thanks, and Regards , Muskan Shukla Desk: 212-729-6543 Ext 635 Tanisha Systems Inc. 99 Wood Ave South, Suite # 308, Iselin, NJ 08830 Email: [email protected] Muskan Shukla | LinkedIn -- Keywords: information technology business works New Jersey |
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| Wed Dec 20 22:49:00 UTC 2023 |